Skip to content
  • Richard Sandiford's avatar
    [AArch64] Make register indices be full 64-bit values · dab26bf4
    Richard Sandiford authored
    aarch64_opnd_info used bitfields to hold vector element indices,
    but values were stored into those bitfields before their ranges had
    been checked.  This meant large invalid indices could be silently
    truncated to smaller valid indices.
    
    The two obvious fixes were to do the range checking earlier or use
    a full 64-bit field for the index.  I went for the latter for two
    reasons:
    
          - Doing the range checking in operand_general_constraint_met_p
            seems structurally cleaner than doing it while parsing.
    
          - The bitfields didn't really buy us anything.  The imm field
            of the union is already 128 bits, so we can use a full int64_t
            index without growing the structure.
    
    The patch also adds missing range checks for the elements in a register
    list index.
    
    include/
    	* opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
    
    opcodes/
    	* aarch64-opc.c (operand_general_constraint_met_p): Check the
    	range of ldst_elemlist operands.
    	(print_register_list): Use PRIi64 to print the index.
    	(aarch64_print_operand): Likewise.
    
    gas/
    	* testsuite/gas/aarch64/diagnostic.s,
    	testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
    dab26bf4